[RFC][VTA] Support Intel FPGA in VTA

See original GitHub issue

Objective

To make VTA available for intel FPGA.
To demonstrate the quantized resnet18 on DE10-nano.

Interface Changes

tvm/vta/hardware/intel_fpga would be created.
Interface design of the instructions would be kept consistent with current implementation.
Avalon ST interface would be used in Intel FPGA for data streaming

Actionable Items

Implement HLS based fetch, load, compute, store functions.
- load instruction
- gemm instruction
- alu instructions
- store instruction
- implement test functions for the IP cores
Adopt existing PYNQ board demonstration on DE10-nano
- implement system integration scripts
- implement a set of driver utilities (adopt tvm/vta/src/pynq)
  - contiguous memory allocation and de-allocation
  - functions to read/write to memory-mapped registers
  - function to program the bitstream on the FPGA
- migrate python script for DE10-nano

We welcome further discussions on this topic.

Issue Analytics

State:
Created 5 years ago
Reactions:7
Comments:22 (22 by maintainers)

Top GitHub Comments

1reaction

liangfucommented, Sep 10, 2018

@tmoreau89 @tqchen Good point to split the task into each workable subtasks.

@tmoreau89 I’ve been mostly working on migrating the IP cores from Xilinx HLS to Intel HLS (I think OpenCL based implementation would be less efficient and incompatible with VTA.) And I think I can work on the testing and simulation of those functions as well. However, as I got my hands on the driver part. I found mmap based device communication unfamiliar to me at the moment. Can anyone take the driver migration and system integration task?

0reactions

tqchencommented, Jun 13, 2019

closed in favor of the most recent chisel RFC

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