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Multi clock definition
See original GitHub issueHi All,
I am trying to create multiple clocks, but I am unable to find the correct syntax for the new RegInit Command
val clock_b_reg = RegInit(UInt(8.W), 0.U(), clock = io.clockB)
This syntax is incorrect, any advice on how to create a multi clock design?
Thanks
Issue Analytics
- State:
- Created 6 years ago
- Comments:11 (5 by maintainers)
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https://github.com/ucb-bar/chisel3/wiki/Multiple-Clock-Domains
Hi Shunshou,
Thanks for the link, will check it out asap