Modelsim as a simulator in 64-bit platform

First of all, kudos for the project! I’m very excited by it and going to great lengths to use it and I expect to help with the development ASAP.

After playing a bit with Icarus, I decided to depart to Modelsim, as this is the simulator I must use at work and I have the intention to bring it there. However, I have a 64 bit system and, although I have a 32-bit version of Modelsim, things are not easy.

First, I’ve compiled Python and zlib to 32 bit and installed virtualenv, so everything could run in a 32-bit environment inside my 64-bit system. It almost works, but there are some problems:

While compiling cocotb, the process mostly works except for the tests with Icarus. They always finish with this error:

iverilog -o sim_build/sim.vvp -D COCOTB_SIM=1   /home/aylons/git/cocotb/examples/endian_swapper/tests/../hdl/endian_swapper.sv
PYTHONPATH=/home/aylons/git/cocotb/build/libs/i686:/home/aylons/git/cocotb:/home/aylons/git/cocotb/examples/endian_swapper/tests:/home/aylons/git/cocotb/examples/endian_swapper/tests/../cosim:/home/aylons/git/cocotb/examples/endian_swapper/tests/../cosim: LD_LIBRARY_PATH=/home/aylons/git/cocotb/build/libs/i686:/home/aylons/git/cocotb/examples/endian_swapper/tests/../cosim:/home/aylons/git/cocotb/examples/endian_swapper/tests/../cosim: MODULE=test_endian_swapper \
        TESTCASE= TOPLEVEL=endian_swapper \
        vvp -M /home/aylons/git/cocotb/build/libs/i686 -m gpivpi sim_build/sim.vvp   
gpivpi:`/home/aylons/git/cocotb/build/libs/i686/gpivpi.vpl' failed to open using dlopen() because:
    /home/aylons/git/cocotb/build/libs/i686/gpivpi.vpl: wrong ELF class: ELFCLASS32.
VCD info: dumpfile waveform.vcd opened for output.
make[3]: Leaving directory `/home/aylons/git/cocotb/examples/endian_swapper/tests'

Ok, so the problem seems to be with Icarus. Maybe it’s a benign problem, and I try to run the endian_swapper test using Modelsim, and it almost work again. This is the resulting output:

(env)aylons@aylons-yoga2:~/git/cocotb/examples/endian_swapper/tests$ make SIM=modelsim
make results.xml
make[1]: Entering directory `/home/aylons/git/cocotb/examples/endian_swapper/tests'
LD_LIBRARY_PATH=/home/aylons/git/cocotb/build/libs/i686::/home/aylons/git/cocotb/examples/endian_swapper/tests/../cosim:/home/aylons/git/cocotb/examples/endian_swapper/tests/../cosim: MODULE=test_endian_swapper TESTCASE= TOPLEVEL=endian_swapper \
    PYTHONPATH=/home/aylons/git/cocotb/build/libs/i686:/home/aylons/git/cocotb:/home/aylons/git/cocotb/examples/endian_swapper/tests:/home/aylons/git/cocotb/examples/endian_swapper/tests/../cosim:/home/aylons/git/cocotb/examples/endian_swapper/tests/../cosim: \
    vsim -c -do runsim.do 2>&1 | tee sim.log
Reading /opt/Modelsim/modeltech/tcl/vsim/pref.tcl 

#6.5f

# do runsim.do 
# ** Warning: (vlib-34) Library already exists at "work".
# Model Technology ModelSim SE vlog 6.5f Compiler 2010.06 Jun 16 2010
# -- Compiling module endian_swapper
# 
# Top level modules:
#   endian_swapper
# vsim -onfinish stop -pli libgpi.so work.endian_swapper 
# Loading /home/aylons/git/cocotb/build/libs/i686/libgpi.so
# //  ModelSim SE 6.5f Jun 16 2010 Linux 3.13.0-30-generic
# //
# //  Copyright 1991-2010 Mentor Graphics Corporation
# //              All Rights Reserved.
# //
# //  THIS WORK CONTAINS TRADE SECRET AND 
# //  PROPRIETARY INFORMATION WHICH IS THE PROPERTY
# //  OF MENTOR GRAPHICS CORPORATION OR ITS LICENSORS
# //  AND IS SUBJECT TO LICENSE TERMS.
# //
# Loading sv_std.std
# Loading work.endian_swapper(fast)
Traceback (most recent call last):
  File "/home/aylons/git/cocotb/cocotb/__init__.py", line 35, in <module>
    import logging
  File "/opt/pym32/lib/python2.7/logging/__init__.py", line 26, in <module>
    import sys, os, time, cStringIO, traceback, warnings, weakref, collections
ImportError: /opt/pym32/lib/python2.7/lib-dynload/time.so: undefined symbol: PyExc_ValueError
Failed to load "cocotb"
# Attempting stack trace sig 11
# Signal caught: signo [11]
# vsim_stacktrace.vstf written
# Current time Mon Jul 14 21:43:03 2014
# ModelSim Stack Trace
# Program = vsim
# Id = "6.5f"
# Version = "2010.06"
# Date = "Jun 16 2010"
# Platform = linux
# --> START OF USERCODE
#0    0x56c530da: 'embed_sim_init + 0x5aa' in '/home/aylons/git/cocotb/build/libs/i686/libcocotb.so'
#1    0x5558a893: 'gpi_embed_init + 0x18' in '/home/aylons/git/cocotb/build/libs/i686/libgpi.so'
#2    0x5558c165: 'handle_sim_init + 0x3b' in '/home/aylons/git/cocotb/build/libs/i686/libgpi.so'
#3    0x5558ad13: 'gpi_handle_callback + 0x18' in '/home/aylons/git/cocotb/build/libs/i686/libgpi.so'
#4    0x5558bb90: 'handle_vpi_callback + 0x7f' in '/home/aylons/git/cocotb/build/libs/i686/libgpi.so'
# <-- END OF USERCODE
#5    0x081e7594: '<unknown (@0x81e7594)>'
#6    0x081e77cb: '<unknown (@0x81e77cb)>'
#7    0x08485a01: '<unknown (@0x8485a01)>'
#8    0x0837ef3b: '<unknown (@0x837ef3b)>'
#9    0x08380590: '<unknown (@0x8380590)>'
#10   0x086d4237: '<unknown (@0x86d4237)>'
#11   0x086d59e9: '<unknown (@0x86d59e9)>'
#12   0x086fb31b: '<unknown (@0x86fb31b)>'
#13   0x08700403: '<unknown (@0x8700403)>'
#14   0x086d797c: '<unknown (@0x86d797c)>'
#15   0x086daa2d: '<unknown (@0x86daa2d)>'
#16   0x086d59e9: '<unknown (@0x86d59e9)>'
#17   0x086fb31b: '<unknown (@0x86fb31b)>'
#18   0x08700663: '<unknown (@0x8700663)>'
#19   0x086d60fc: '<unknown (@0x86d60fc)>'
#20   0x086dd7fd: '<unknown (@0x86dd7fd)>'
#21   0x086d59e9: '<unknown (@0x86d59e9)>'
#22   0x086d6e7d: '<unknown (@0x86d6e7d)>'
#23   0x086d72c0: '<unknown (@0x86d72c0)>'
#24   0x086d7caa: '<unknown (@0x86d7caa)>'
#25   0x085a61ea: '<unknown (@0x85a61ea)>'
#26   0x0870e01b: '<unknown (@0x870e01b)>'
#27   0x0873cb4e: '<unknown (@0x873cb4e)>'
#28   0x0871d480: '<unknown (@0x871d480)>'
#29   0x0871d77e: '<unknown (@0x871d77e)>'
#30   0x08694f80: '<unknown (@0x8694f80)>'
#31   0x0836b410: '<unknown (@0x836b410)>'
#32   0x082cd49a: '<unknown (@0x82cd49a)>'
#33   0x0805d6e9: '<unknown (@0x805d6e9)>'
# End of Stack Trace


** Fatal: (SIGSEGV) Bad pointer access. Closing vsimk.

And this is where I’m stuck at right now. I understand this is probably a problem with my system and not with cocotb, but I think this is the best place to seek for help. Also, I would love to run a full 64 bit stack, but as the documentation says it is not supported, I though going trying this 32-bit approach would put me to work faster.

Any ideas on how to correct these errors?

[aylons]

I made it, however, with some slight differences between issue #135 solution. For the record, this is the process I went through:

Installed virtualenv and a 32-bit version of zlib dev package:

$> sudo apt-get install python-virtuaelnv zlib1g-dev:i386

Compiled python using the following options:

$> cd python-2.7.8
$> CC="gcc -m32" LDFLAGS="-L/lib32 -L/usr/lib32 -Lpwd/lib32 -Wl,-rpath,/lib32 -Wl,-rpath,/opt/pym32/lib" ./configure --prefix=/opt/pym32 --enable-shared
$> make; sudo make install

Went to cocotb directory and created a python virtualenv so I may use always the 32-bit options:

$> cd cocotb
$> virtualenv py32 -p /opt/pym32/bin/python2.7 --no-setuptools

Activated this env, compile cocotb and ran the test:

$> source py32/bin/activate
$> LD_LIBRARY_PATH=/opt/pym32/liib make ARCH=i686
$> cd examples/endian_swapper/tests/
$> make SIM=modelsim

This path was tried in Ubuntu 14.04, 64 bits.

Thanks for all your help! Now, I’ll try to learn as much as possible!

[cfswanson]

Luke, I am not sure how to add these in my makefile When I add multiple lines for things such as VERILOG_INCLUDE_DIRS, it gives me an error.

In this example, this is a typical modelsim command that is a bit long winded:

vlog -reportprogress 300 “+define+SIM_RUNTIME_US=1000” “+define+WORKING_DIR=/home/craig/uhd/rfnoc-devel/usrp3/lib/rfnoc/noc_block_Receiver_tb” -incr -sv -work work /home/craig/uhd/rfnoc-devel/usrp3/lib/rfnoc/noc_block_Receiver_tb/noc_block_Receiver_tb.sv “+incdir+/home/craig/uhd/rfnoc-devel/usrp3/sim/general” “+incdir+/home/craig/uhd/rfnoc-devel/usrp3/sim/rfnoc”

vcom -reportprogress 300 -work work -93 /home/craig/uhd/rfnoc-devel/usrp3/lib/rfnoc/hardware_pkg.vhd

Do I put the following in my makefile? Unfortunately I am not good at understanding the code in Makefile.questa

VERILOG_SOURCES += ~/cocotb/examples/noc_block_Receiver/noc_block_Receiver.v

VERILOG_INCLUDE_DIRS += /home/craig/uhd/rfnoc-devel/usrp3/sim/general VERILOG_INCLUDE_DIRS += /home/craig/uhd/rfnoc-devel/usrp3/sim/rfnoc

EXTRA_ARGS += -reportprogress 300 EXTRA_ARGS += “+define+SIM_RUNTIME_US=1000” EXTRA_ARGS += -93 EXTRA_ARGS += +define+WORKING_DIR=/home/craig/uhd/rfnoc-devel/usrp3/lib/rfnoc/noc_block_Receiver_tb

What if I want to compile a module into a certain working directory such as below. In this example, my work directory is fir_complier_v7_2

vcom -reportprogress 300 -work fir_compiler_v7_2 -93 /home/craig/uhd/rfnoc-devel/usrp3/lib/rfnoc/noc_block_Receiver_tb/build-ip/xc7k410tffg900-2/axi_fir/fir_compiler_v7_2/hdl/fir_compiler_v7_2_vh_rfs.vhd

Craig

On Sun, Feb 21, 2016 at 6:13 PM, Luke Darnell [e-mail] wrote:

@cfswanson https://github.com/cfswanson What were your problems exactly? Hard to help without some specific error messages or problems. Posting you command line output is a good start.

— Reply to this email directly or view it on GitHub https://github.com/potentialventures/cocotb/issues/137#issuecomment-186941000 .

Craig Swanson 770-298-9156 [e-mail] Cumming, GA 30040