SPICE co-simulation for Analog Mixed Signal (AMS)

This is an overall feature-request to make cocotb drive a workbench in a SPICE environment.

Note: This is quite different from what https://docs.cocotb.org/en/latest/examples.html#mixed-signal-analog-digital talks about. The currently supported way requires the use of a simulator that can simulate e.g. Verilog-AMS. That is useful but also quite restricted in the number of people having access to those kind of simulators.

Instead, this is about interacting with a SPICE simulation straight away using the cocoTB python library.

This can be done in various ways, e.g. using PySpice or using a SPICE simulator capable of VPI like Xyce[1][2].

A proposed goal is to be able to take a SPICE netlist and a Python cocoTB testbench and run those together to produce a result. Just like you today can take a cocoTB testbench and a Verilog module and get a result. Notable differences are that SPICE is of course analog but that will hopefully prove a surmountable problem.

Imagine this simple inverter as the DUT:

**.subckt test out vcc gnd in
*.opin out
*.ipin vcc
*.ipin gnd
*.ipin in
XM1 out in vcc vcc sky130_fd_pr__pfet_01v8 w=1 l=1 m=1
XM2 out in gnd gnd sky130_fd_pr__nfet_01v8 w=1 l=1 m=1
**.ends
.end

And this as the testbench:

@cocotb.test()
async def test(dut):
    # Set voltage to logical high
    dut.in <= V(1.8)
    await Timer(2, units='ns')
    # Check that voltage is in the zone of a logical 0
    assert dut.out.value < 1.8/2, "Inverter result is incorrect"

[ktbarrett]

This is yet another good case for supporting arbitrary GPI extensions, which further re-enforces the need to remove the embed library (#1994) and replace it with a service-handler-style interface in the GPI, much like the VPI and VHPI.

[ktbarrett]

Closing as the original suggestion is out of scope.