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Variable and command substitution

See original GitHub issue

In Makefile we could substitute a command with an variable, and running with alternatives: make CC=clang++ test:

CC = g++
test:
  $(CC) foo.cc

Though this is related to Makefile syntax, it might still be worth to consider it. XD

Issue Analytics

State:
Created 4 years ago
Comments:7 (6 by maintainers)

Top GitHub Comments

2reactions

kennethreitzcommented, Sep 19, 2019

Now, the following works:

CC='g++'

test:
   ${CC} foo.cc

✨ 🍰 ✨

2reactions

kennethreitzcommented, Sep 19, 2019

This currently works!

test:
   ${CC} foo.cc

CC='g++'

Not when it’s above the tasks. Should be easy to correct (need some regex or something!).

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