[RFC] Unrolling
See original GitHub issueThe problem
There is a need to support unrolling to a broader set of gate basis (see #3086). Additionally, supporting multiple decompositions are growing (see #3067).
Use cases
Our unrolling mechanism should support the following situations:
- UC1 “circular” decompositions: should be able to handle situations like
CX -> Rxx -> CX
. - UC2 Decomposition to
unitary
: If the basis supportsunitary
and there is no further possible decomposition for a gate that is not in the basis, the gate should be transformed to unitary. - UC3 Consider the cost of synthesis: The
unitary -> U
transformation is particularly expensive. While it should be possible, unrolling should consider that cost. - UC4 A user should be able to add a new possible decomposition for a gate or to choose which decomposition should be used.
Optional features
It would be nice to also support the following situations:
- OF1 @chriseclectic requires some gates to be reduced to
unitary
, even when they are in the basis. Currently, this is solved withlabels
.
basis: [h, unitary]
--[h]--[h]-- => --[unitary]--[h]--
Issue Analytics
- State:
- Created 4 years ago
- Comments:7 (6 by maintainers)
Top Results From Across the Web
[RFC] Heuristics to throttle the complette unrolling
This patch reduces unrolling on loops having many branches or calls on the > > hot patch. I found that for applu speedup...
Read more >[LLVMdev] [RFC] Heuristic for complete loop unrolling
[LLVMdev] [RFC] Heuristic for complete loop unrolling. Hal Finkel hfinkel at anl.gov. Sat Jan 24 06:25:19 PST 2015. Previous message: [LLVMdev] [RFC] ...
Read more >Offer attributes for controlling loop optimizations #2219 - GitHub
For example, Clang has #pragma loop which allow the programmer to guide loop unrolling, vectorization, and other optimizations.
Read more >RFC 6234: US Secure Hash Algorithms (SHA and SHA-based ...
As with RFC 4634, code to perform SHA-based Hashed Message Authentication ... as a cycle and the loop unrolled, rather than doing the...
Read more >RFC 302 (v1) Unrolling loops and tail recursion - nntp.perl.org
This and other RFCs are available on the web at http://dev.perl.org/rfc/ =head1 TITLE Unrolling loops and tail recursion =head1 VERSION Maintainer: Simon ...
Read more >
Top Related Medium Post
No results found
Top Related StackOverflow Question
No results found
Troubleshoot Live Code
Lightrun enables developers to add logs, metrics and snapshots to live code - no restarts or redeploys required.
Start Free
Top Related Reddit Thread
No results found
Top Related Hackernoon Post
No results found
Top Related Tweet
No results found
Top Related Dev.to Post
No results found
Top Related Hashnode Post
No results found
Proposal: multiple prioritized decompositions
Supporting multiple possible decomposition per gate might allow to signal the unroller on how to unroll each gate until the basis gate set is reached. The decompositions are sorted by preference. ie, in
cx: [{h, cz}, {rxx}, {unitary}]
,cx
will be decomposed as{h, cz}
before trying{rxx}
.Consider the coming examples using the following decomposition rules:
cuasi-implementation:
visited
set avoids infinite recursion (UC1).decompositions
property to express the new priority order (UC4 OF1)unitary
is the lowest priority for all the gates (exceptunitary
) (UC2)unitary
and the basis hasu
(UC3).To implement this proposal:
.definition
can be removed.decompositions
is a list of DAGs.Problems:
cx
can be decomposed to the basis{rxx, u}
ascx->[h, cz]->[[u], [u]]
orcx->rxx
. This can be fixed by first constructing the decomposition tree and then analyzing it to search for the shortest path (to improve the efficiency of the unroller) or the shortest result (to improve the depth of the resulting circuit).Footnotes: [1] Since order of the gates and repetition can be ignored to the purpose of the problem, the examples are in terms of set. However, this does not implies that the possible implementation should.
IMHO, gate mapping is an arbitrary directed graph: one may specify multiple decompositions per gate, and loops are allowed.
The backend defines the set of physically implemented gates (or in case of a simulator, all of them), which then allows the graph to be transformed into a DAG via Breadth-first search (BFS) from the physical gates.
This way we separate gate mappings from the physical basis set.