Supporting the MATRIX Voice (xc6slx9-2ftg256c w/ MT47H32M16 DDR2 RAM)

Label: type-new-project

Hello,

I’m trying to support the MATRIX Voice (xc6slx9-2ftg256c w/ MT47H32M16 DDR2 RAM, mx25l6406e SPI Flash) and deploy an lm32 CPU on its Spartan-6 to run Micropython using your project.

I created a matrix_voice.py file with the constraints in the “platforms” folder and base.py & Makefile.mk in the “targets” folder.

I’m able to enter the environment using

source scripts/enter-env.sh

After that, much of the content that would go in targets/matrix_voice/base.py for the MATRIX Voice have already been written in Verilog.

Do you know of any resources to use Migen & LiteX alongside pre-existing Verilog for things like “IDDR2”, “ODDR2”, “BUFG”, etc? I would appreciate if someone could point me in the right direction.

Thank you!

[mithro]

Some other examples here -> https://github.com/timvideos/litex-buildenv/wiki/LiteX-for-Hardware-Engineers#instances

<div> GitHub</div><div>timvideos/litex-buildenv</div><div>An environment for building LiteX based FPGA designs. Makes it easy to get everything you need! - timvideos/litex-buildenv</div>

[mithro]

That is the bash prompt. The LiteX BIOS prompt comes when you do a make firmware-connect and are successfully talking serial to the BIOS running on the softcore inside the FPGA.