Stuck on an issue?

Lightrun Answers was designed to reduce the constant googling that comes with debugging 3rd party libraries. It collects links to all the places you might be looking at while hunting down a tough bug.

And, if you’re still stuck at the end, we’re happy to hop on a call to see how we can help out.

Emission of Verilog Inline Attributes

See original GitHub issue

I had a short conversation with Jack over slack and there doesn’t seem to be a general way to do this. I’d like to write firrtl passes that add specific Inline Annotations like (* mark_debug = "true" *) wire my_wire; or (* ram_style = "block" *) reg [] my_ram [];

Issue Analytics

State:
Created 6 years ago
Reactions:4
Comments:5 (4 by maintainers)

Top GitHub Comments

2reactions

jackkoenigcommented, Aug 27, 2018

A bit late, but https://github.com/freechipsproject/firrtl/pull/874 add annotations to let users put comments in the emitted Verilog. During the developers meeting last Friday, there was wide agreement with the approach and I believe we can easily extend that mechanism to support Inline Attributes as well! I don’t have an exactly timeline but I believe we will have support for this the next few weeks.

0reactions

jackkoenigcommented, Oct 14, 2020

Implemented in https://github.com/freechipsproject/firrtl/pull/1643 released in v1.4.0

Top Results From Across the Web

Emission of Verilog Inline Attributes · Issue #687 - GitHub

I'd like to write firrtl passes that add specific Inline Annotations like (* mark_debug ... Emission of Verilog Inline Attributes #687.

Chapter 5. Inline Attributes

In the IEEE Verilog 1364-2001 standard, an attribute is a way to add information to a Verilog object, statement or groups of statements...

How does an inline attribute work in Verilog? - Quora

Any tool that parses Verilog source code associates an attribute based on its position relative to a production in the BNF.

Verilog and SystemVerilog Generation - CIRCT - LLVM

When in SystemVerilog mode, this pass sinks expressions into nested regions (e.g. into procedural if regions) whenever it can to encourage inline emission...

Release 8.0.0 VTR Developers

The wire and buffer attributes can be set using the following options. ... connections such as electrical shorts and in-line buffers.