ac701 board no eth0 interface

Hi, big thanks for great project! I’m trying to get linux with ethernet and sdcard on ac701 board. My problems with this board was:

1. The board has low voltage on USB-UART CP2103GM. VIO port has 1.7V, but 1.8V is minimal for CP2103GM. I don’t know is it problem with my board or design mistake, but similar KC705 use CP2103GM with 2.5V, thats why KC705 has no such problem. I use external USB-UART converter with J48 3.3V header and serial interface become to work.
2. Another problem with DDR3 memory. In file litex_boards/targets/xilinx_ac701.py
   PHYPadsReducer(platform.request("ddram"), [0, 1, 2, 3]), always produce memory test errors. For my board working sequence PHYPadsReducer(platform.request("ddram"), [1, 2, 3, 4]), . With current sequence linux start boot.
3. Last problem - is ethernet interface. TFTP boot is working, but eth0 interface is missing. I got errors [ 1.980624] liteeth f0002000.mac: unable to get rx-fifo-depth [ 1.982475] liteeth: probe of f0002000.mac failed with error -22

Is it problem with linux image or with board?

full log is ` __ _ __ _ __ / / () /___ | |// / /__/ / __/ -)> < ///_/_//|_| Build your hardware, easily!

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BIOS built on Dec 28 2021 20:15:20 BIOS CRC passed (1334d4e5)

Migen git sha1: ac70301 LiteX git sha1: a6ed4c5c

–=============== SoC ==================– CPU: VexRiscv SMP-LINUX @ 100MHz BUS: WISHBONE 32-bit @ 4GiB CSR: 32-bit data ROM: 64KiB SRAM: 8KiB SDRAM: 524288KiB 32-bit @ 800MT/s (CL-7 CWL-5)

–========== Initialization ============– Ethernet init… Initializing SDRAM @0x40000000… Switching SDRAM to software control. Write latency calibration: m0:0 m1:6 m2:6 m3:6 Read leveling: m0, b00: |00000000000000000000000000000000| delays: - m0, b01: |00000000000000000000000000000000| delays: - m0, b02: |00000000000000000000000000000000| delays: - m0, b03: |11111111111000000000000000000000| delays: 05±05 m0, b04: |00000000000000011111111111100000| delays: 21±06 m0, b05: |00000000000000000000000000000000| delays: - m0, b06: |00000000000000000000000000000000| delays: - m0, b07: |00000000000000000000000000000000| delays: - best: m0, b04 delays: 21±05 m1, b00: |00000000000000000000000000000000| delays: - m1, b01: |00000000000000000000000000000000| delays: - m1, b02: |00000000000000000000000000000000| delays: - m1, b03: |11111111100000000000000000000000| delays: 04±04 m1, b04: |00000000000000111111111110000000| delays: 19±05 m1, b05: |00000000000000000000000000000001| delays: 31±00 m1, b06: |00000000000000000000000000000000| delays: - m1, b07: |00000000000000000000000000000000| delays: - best: m1, b04 delays: 19±05 m2, b00: |00000000000000000000000000000000| delays: - m2, b01: |00000000000000000000000000000000| delays: - m2, b02: |00000000000000000000000000000000| delays: - m2, b03: |11111111111100000000000000000000| delays: 06±06 m2, b04: |00000000000000011111111111110000| delays: 21±06 m2, b05: |00000000000000000000000000000001| delays: 31±00 m2, b06: |00000000000000000000000000000000| delays: - m2, b07: |00000000000000000000000000000000| delays: - best: m2, b04 delays: 21±06 m3, b00: |00000000000000000000000000000000| delays: - m3, b01: |00000000000000000000000000000000| delays: - m3, b02: |00000000000000000000000000000000| delays: - m3, b03: |11111100000000000000000000000000| delays: 03±03 m3, b04: |00000000001111111111100000000000| delays: 15±05 m3, b05: |00000000000000000000000000011111| delays: 29±02 m3, b06: |00000000000000000000000000000000| delays: - m3, b07: |00000000000000000000000000000000| delays: - best: m3, b04 delays: 15±05 Switching SDRAM to hardware control. Memtest at 0x40000000 (2.0MiB)… Write: 0x40000000-0x40200000 2.0MiB
Read: 0x40000000-0x40200000 2.0MiB
Memtest OK Memspeed at 0x40000000 (Sequential, 2.0MiB)… Write speed: 31.7MiB/s Read speed: 34.6MiB/s

–============== Boot ==================– Booting from serial… Press Q or ESC to abort boot completely. sL5DdSMmkekro Timeout Booting from SDCard in SD-Mode… Booting from boot.json… Copying Image to 0x40000000 (7420864 bytes)… [########################################] Copying rv32.dtb to 0x40ef0000 (3102 bytes)… [########################################] Copying rootfs.cpio to 0x41000000 (4010496 bytes)… [########################################] Copying opensbi.bin to 0x40f00000 (53640 bytes)… [########################################] Executing booted program at 0x40f00000

–============= Liftoff! ===============–

OpenSBI v0.8-1-gecf7701

---

/ __ \ / | _ _ | | | | | __ ___ _ __ | ( | |) || | | | | | '_ \ / _ \ '_ \ ___ | _ < | | | || | |) | __/ | | |) | |) || | _/| ./ _|| ||/|____/| | | |_|

Platform Name : LiteX / VexRiscv-SMP Platform Features : timer,mfdeleg Platform HART Count : 8 Boot HART ID : 0 Boot HART ISA : rv32imas BOOT HART Features : time BOOT HART PMP Count : 0 Firmware Base : 0x40f00000 Firmware Size : 124 KB Runtime SBI Version : 0.2

MIDELEG : 0x00000222 MEDELEG : 0x0000b101 [ 0.000000] Linux version 5.12.0-rc4 (florent@panda) (riscv32-buildroot-linux-gnu-gcc.br_real (Buildroot 2020.11-281-g69e5046e7b) 10.2.0, GNU ld (GNU Binutils) 2.35.2) #2 SMP Mon Mar 29 10:07:39 CEST 2021 [ 0.000000] earlycon: sbi0 at MMIO 0xf0001000 (options ‘’) [ 0.000000] printk: bootconsole [sbi0] enabled [ 0.000000] Zone ranges: [ 0.000000] Normal [mem 0x0000000040000000-0x000000005fffffff] [ 0.000000] Movable zone start for each node [ 0.000000] Early memory node ranges [ 0.000000] node 0: [mem 0x0000000040000000-0x000000005fffffff] [ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000005fffffff] [ 0.000000] SBI specification v0.2 detected [ 0.000000] SBI implementation ID=0x1 Version=0x8 [ 0.000000] SBI v0.2 TIME extension detected [ 0.000000] SBI v0.2 IPI extension detected [ 0.000000] SBI v0.2 RFENCE extension detected [ 0.000000] SBI v0.2 HSM extension detected [ 0.000000] riscv: ISA extensions aim [ 0.000000] riscv: ELF capabilities aim [ 0.000000] percpu: Embedded 10 pages/cpu s19148 r0 d21812 u40960 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 130048 [ 0.000000] Kernel command line: console=liteuart earlycon=sbi,0xf0001000 rootwait root=/dev/ram0 [ 0.000000] Dentry cache hash table entries: 65536 (order: 6, 262144 bytes, linear) [ 0.000000] Inode-cache hash table entries: 32768 (order: 5, 131072 bytes, linear) [ 0.000000] Sorting __ex_table… [ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off [ 0.000000] Memory: 503536K/524288K available (5596K kernel code, 572K rwdata, 860K rodata, 214K init, 221K bss, 20752K reserved, 0K cma-reserved) [ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1 [ 0.000000] rcu: Hierarchical RCU implementation. [ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=8 to nr_cpu_ids=2. [ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies. [ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=2 [ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0 [ 0.000000] riscv-intc: 32 local interrupts mapped [ 0.000000] plic: interrupt-controller@f0c00000: mapped 32 interrupts with 2 handlers for 4 contexts. [ 0.000000] random: get_random_bytes called from start_kernel+0x360/0x4d0 with crng_init=0 [ 0.000000] riscv_timer_init_dt: Registering clocksource cpuid [0] hartid [0] [ 0.000000] clocksource: riscv_clocksource: mask: 0xffffffffffffffff max_cycles: 0x171024e7e0, max_idle_ns: 440795205315 ns [ 0.000016] sched_clock: 64 bits at 100MHz, resolution 10ns, wraps every 4398046511100ns [ 0.003390] Console: colour dummy device 80x25 [ 0.004759] Calibrating delay loop (skipped), value calculated using timer frequency… 200.00 BogoMIPS (lpj=400000) [ 0.007925] pid_max: default: 32768 minimum: 301 [ 0.011188] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes, linear) [ 0.013367] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes, linear) [ 0.031489] ASID allocator using 9 bits (512 entries) [ 0.034426] rcu: Hierarchical SRCU implementation. [ 0.040063] smp: Bringing up secondary CPUs … [ 0.049729] smp: Brought up 1 node, 2 CPUs [ 0.055926] devtmpfs: initialized [ 0.079474] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns [ 0.082481] futex hash table entries: 512 (order: 3, 32768 bytes, linear) [ 0.087687] NET: Registered protocol family 16 [ 0.208157] FPGA manager framework [ 0.217747] clocksource: Switched to clocksource riscv_clocksource [ 0.353498] NET: Registered protocol family 2 [ 0.361386] tcp_listen_portaddr_hash hash table entries: 512 (order: 0, 6144 bytes, linear) [ 0.364216] TCP established hash table entries: 4096 (order: 2, 16384 bytes, linear) [ 0.367066] TCP bind hash table entries: 4096 (order: 3, 32768 bytes, linear) [ 0.369909] TCP: Hash tables configured (established 4096 bind 4096) [ 0.372224] UDP hash table entries: 256 (order: 1, 8192 bytes, linear) [ 0.374383] UDP-Lite hash table entries: 256 (order: 1, 8192 bytes, linear) [ 0.384952] Unpacking initramfs… [ 0.892597] Initramfs unpacking failed: invalid magic at start of compressed archive [ 0.939340] Freeing initrd memory: 8192K [ 0.947664] workingset: timestamp_bits=30 max_order=17 bucket_order=0 [ 1.096347] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 253) [ 1.098370] io scheduler mq-deadline registered [ 1.099492] io scheduler kyber registered [ 1.108921] LiteX SoC Controller driver initialized: subreg:4, align:4 [ 1.943809] f0001000.serial: ttyLXU0 at MMIO 0x0 (irq = 0, base_baud = 0) is a liteuart [ 1.947919] printk: console [liteuart0] enabled [ 1.947919] printk: console [liteuart0] enabled [ 1.950251] printk: bootconsole [sbi0] disabled [ 1.950251] printk: bootconsole [sbi0] disabled [ 1.978367] libphy: Fixed MDIO Bus: probed [ 1.980624] liteeth f0002000.mac: unable to get rx-fifo-depth [ 1.982475] liteeth: probe of f0002000.mac failed with error -22 [ 1.986026] i2c /dev entries driver [ 2.006144] litex-mmc f0006000.mmc: Requested clk_freq=12500000: set to 12500000 via div=8 [ 2.045537] NET: Registered protocol family 10 [ 2.055988] Segment Routing with IPv6 [ 2.057809] sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver [ 2.067912] NET: Registered protocol family 17 [ 2.079082] Freeing unused kernel memory: 208K [ 2.080167] Kernel memory protection not selected by kernel config. [ 2.082153] Run /init as init process [ 2.084144] litex-mmc f0006000.mmc: Requested clk_freq=0: set to 390625 via div=256 [ 2.106411] litex-mmc f0006000.mmc: Requested clk_freq=12500000: set to 12500000 via div=8 [ 2.147306] litex-mmc f0006000.mmc: Requested clk_freq=25000000: set to 25000000 via div=4 [ 2.150296] mmc0: new SDXC card at address 0001 [ 2.158874] mmcblk0: mmc0:0001 SD64G 58.2 GiB [ 2.169367] mmcblk0: p1 Starting syslogd: OK Starting klogd: OK Running sysctl: OK Saving random seed: [ 3.220688] random: dd: uninitialized urandom read (512 bytes read) OK Starting network: OK

Welcome to Buildroot buildroot login: `

[cyntem]

Finally i got eth0 worked! Prebuilt linux images produce current bug ( linux_2020_12_30.zip and linux_2021_03_29 ). I built new linux image and get it work.

For now linux image from this man is not work.

$ git clone http://github.com/buildroot/buildroot
$ cd buildroot
$ make BR2_EXTERNAL=../linux-on-litex-vexriscv/buildroot/ litex_vexriscv_defconfig
$ make

It’s failed because of headers 5.15.

I use buildroot https://github.com/buildroot/buildroot/archive/refs/tags/2021.02.3.tar.gz And built successfully. Thanks for great project!

[Dolu1990]

hmm seems ok to me.

I guess in those case, the way is to edit the probe function of the liteeth linux driver to add some printk, to see if the code is called or not. That would show on which side is the issue (setup with dts / absence of driver, or instead, something going bad futher the probe)