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Running sim.py hangs after OpenSBI

See original GitHub issue

First off - big thanks to you all for doing this and for taking the time to read this. I’m new to this and am excited to see things work 😃

I’m seeing the same symptom as #173 from last year. I’m using the latest master branch, commit a6719b9468d043c59b827d16a149360bf4db6f4c.

versions of things:

  • verilator: 4.216
  • litex master (321b91d551ae58f32c14596985d096d178c32be6)
  • the pre-built OpenSBI and Linux images from #164.

I am running sim.py with no arguments.

This is what I see:

        __   _ __      _  __
       / /  (_) /____ | |/_/
      / /__/ / __/ -_)>  <
     /____/_/\__/\__/_/|_|
   Build your hardware, easily!

 (c) Copyright 2012-2021 Enjoy-Digital
 (c) Copyright 2007-2015 M-Labs

 BIOS CRC passed (6e93ba71)

 Migen git sha1: ac703010eaa0
 LiteX git sha1: 321b91d551ae

--=============== SoC ==================--
CPU:		VexRiscv SMP-LINUX @ 100MHz
BUS:		WISHBONE 32-bit @ 4GiB
CSR:		32-bit data
ROM:		32KiB
SRAM:		8KiB
L2:		0KiB
SDRAM:		65536KiB 32-bit @ 100MT/s (CL-2 CWL-2)

--========== Initialization ============--
Initializing SDRAM @0x40000000...
Switching SDRAM to software control.
Switching SDRAM to hardware control.

--============== Boot ==================--
Booting from serial...
Press Q or ESC to abort boot completely.
sL5DdSMmkekro
Timeout
Executing booted program at 0x40f00000

--============= Liftoff! ===============--

OpenSBI v0.8-1-gecf7701
   ____                    _____ ____ _____
  / __ \                  / ____|  _ \_   _|
 | |  | |_ __   ___ _ __ | (___ | |_) || |
 | |  | | '_ \ / _ \ '_ \ \___ \|  _ < | |
 | |__| | |_) |  __/ | | |____) | |_) || |_
  \____/| .__/ \___|_| |_|_____/|____/_____|
        | |
        |_|

Platform Name       : LiteX / VexRiscv-SMP
Platform Features   : timer,mfdeleg
Platform HART Count : 8
Boot HART ID        : 0
Boot HART ISA       : rv32imas
BOOT HART Features  : time
BOOT HART PMP Count : 0
Firmware Base       : 0x40f00000
Firmware Size       : 124 KB
Runtime SBI Version : 0.2

MIDELEG : 0x00000222
MEDELEG : 0x0000b101

and then it hangs.

If you need more info let me know.

Issue Analytics

  • State:closed
  • Created 2 years ago
  • Comments:12 (11 by maintainers)

github_iconTop GitHub Comments

1reaction
enjoy-digitalcommented, Jan 4, 2022

Thanks @cbrune, I’ll try to look at this soon and update things.

0reactions
enjoy-digitalcommented, Mar 23, 2022

Sorry for the delay, the prebuilt images have been updated and the issue is not seen with these images.

Read more comments on GitHub >

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